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MIS Voltage Capacitance

发布时间:2017-04-01
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LAB3: MEASUREMENTS OF C(V) CHARACTERISTICS OF MIS-STRUCTURES

Objective:

To study C(V) characteristics of MIS structure including the effects of frequency and illumination, to determine the parameters of MIS-structures.

Description:

By considering an ideal p-type MIS, the semiconductor and metal gate have identical work functions. It is assumed there is no charge at the interface. This means that with no voltage applied. All bands will be horizontal or flat. When a negative potential V is applied to the metal, the energy of all of its conduction electrons is raised. Holes are attracted to the semiconductor-oxide interface making the semiconductor appear to be even more P-type than originally. This causes the band bending at the interface shown in .

As the polarity of V is reversed the overall capacitance decreases. Depletion (Figure 3.1) occurs for positive voltages where the positive charge on the gate pushes the holes into the substrate. Therefore, the semiconductor is depleted of carriers at the interface and a negative charge due to the ionized acceptor ions is left in the space charge region. The bands bend the other way, and near the interface the semiconductor is acquiring an N-like character.

Extreme band bending is characteristic of the inversion regime (Figure3.2).Inversion occurs at voltages beyond the threshold voltage. In inversion, there exists a negatively charged inversion layer at the interface in addition to the depletion-layer. This inversion layer is due to the minority carriers that are attracted to the interface by the positive gate voltage.

Result:

Capacitance

Light

Cover with box

Voltage (V)

100Hz (nF)

1kHz (nF)

10kHz (nF)

100Hz (nF)

-5

1.359

1.267

0.963

1.36

-4.5

1.337

1.247

0.955

1.337

-4

1.288

1.202

0.929

1.288

-3.5

1.158

1.082

0.865

1.158

-3

0.954

0.845

0.629

0.903

-2.5

1.06

0.525

0.397

0.607

-2

1.171

0.755

0.516

0.888

-1.5

1.263

1.094

0.792

1.274

-1

1.362

1.212

0.863

1.372

-0.5

1.383

1.251

0.91

1.345

0

1.404

1.264

0.919

1.344

0.5

1.416

1.273

0.953

1.386

1

1.372

1.277

0.965

1.378

1.5

1.398

1.282

0.971

1.393

2

1.444

1.283

0.973

1.389

2.5

1.392

1.285

0.966

1.389

3

1.424

1.283

0.971

1.394

3.5

1.442

1.287

0.964

1.402

4

1.405

1.287

0.981

1.396

4.5

1.339

1.28

0.978

1.387

5

1.402

1.282

0.976

1.398

Graph 3.3-C(V) characteristic of MIS capacitor

Calculation:

Given,

From graph we get = 1.4n, so

Given that diameter of the semiconductor = 2. Thus area,

Substitute , = 1.4nand given= 5 into

nm

0.8 of = , from the graph,

VFB = -2.25

VFB

Discussion:

From the C-V graph above, it can be concluded that it is an n- type MIS structure. This is because when the positive voltage (V>0) is applied to the metal plate, from the graph, the capacitance reaches it maximum value which is in the accumulation mode, when negative voltage (V<0) is applied, it goes into inversion mode which resemble the CV characteristic of n type MIS structure.

From the graph above, at high frequency (10 kHz) the minority carriers (holes) cannot follow AC signal, so they do not contribute to the capacitance. However at low frequency (100 Hz) the minority carriers can follow the ac gate voltage variation and exchange charge with the inversion layer and thus the capacitance rises.

This experiment also had been conducted in bright and dark condition with supply of 100Hz signal. During dark condition, it found the value of the capacitance did not rise in the inversion region. This is because of no light appearance on MIS to contribute energy to break electrons from the bonding and leading to the capacitance in strong inversion.

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